I have been rather successfully using EagleCAD, for designing schematics, and then Veroboard/Stripboard layouts (instead of PCB layouts).
Here are a few of the gotchas that I have found.
Note that this article covers boards only. For schematic layout issues, see EagleCAD nuances – schematics
- 65 x 95 mm (2.5″ x 3.75″) => 24 strips x 37 holes
- 65 x 145 mm (2.5″ x 5.75″) => 24 strips x 56 holes
The free version of EagleCAD will limit you to a board size of 32 tracks x 40 holes (87.6 x 102.7 mm or 3.3″ x 4.05″), w.r.t. component placement within the boards confines – any tracks/wires themselves can be placed outside of the board.
If you place ICs sequentially, you will generally not have any problem with the IC part numbers. However, if you copy and paste parts of different/disparate schematic in to a new schematic, you may end up with a situation such as this:
- A 4081 has four AND gates, you have two used, but they appear as separate ICs, IC1a and IC3b.
- You you have a Dual D type flip flop 4013, and the two appear as IC1a and IC3a
(Auto) Renumbering Tools->Renumber parts… will not help, you’ll only get IC1a and IC2a, if you are lucky. You can not rename the second gate/section of the IC with the same IC number as the first gate/section – if you try to you will get the message “IC1 already exists”. See Eagle – Names – Numbering, which offers a way of getting sequential numbering, but does not provide a solution to multiple gates/sections labelling.
The only option I know of is to delete the two instances, and then re-add them using the Add option.
Deleting unnecessary vias
From delete unnecessary via-p/6858487, it is necessary to both Ripup and Ratsnest (I find that you have to move any overlapping track away and then the via away, and then move the track back to its original position, and then repeatedly try Ratsnest and Ripup in various orders, in order to get this to work):
If you click ripup and then click on the via, the via will turn into a yellow X if you [then click] ratsnest then you’ll see that the airwires are recalculated and the yellow X is gone.
Transistors which come in TO-92 packages (such as the
BC557) have a 0.05″ inter-pin footprint,
and as such, do not fit nicely on the 0.1″ grid.
So you either have to
- fiddle the grid, momentarily to be 0.05″ and then route the “middle” pin (as in the above image), or;
- Create a custom library part and make new 0.1″ footprints, according to TO92 alternative footprint
- Use a generic transistor type, from under
*-NPN-, and manually add the
VALUE, such as:
- from under
- from under
- from under
- Use the correct transistor (!), which has 0.1″ spacing, i.e.
Compare the two, paying particular attention to the scale of each
- The EAGLE Schematic & PCB Layout Editor – A Guide, by Tom Clarke, v1.03, PDF:
- Best practices creating designs with EAGLE
Board size limit
The free ware version has an annoying board size limit, that you will probably only come up against, only after you are halfway through a complex board layout – most annoying.
Clicking whilst holding the Cmd key (Ctrl click on windows), will snap items onto the grid.
The Grid dialog can be accessed for the View -> Grid… menu or the Grid icon in the top left of the Board window.
Setting the grid to 0.1″ is a good idea for vero/strip board. However, items often will appear in between grid lines, annoyingly necessitating that you switch back to a 0.05″ grid and re-position each item individually, before going back to a 0.1″ grid. I am not sure why EagleCAD does this.
The Alt setting can be used for finer adjustment, and is accessed by pressing the Option key (Alt key in Windows), whilst dragging components. It can be a good idea to set this to 0.05″, to get around the problem outlined above where components do not sit perfectly on the grid.
The Board outline is on layer 20 Dimension.
For more information on both Grid and Board settings, see Using EAGLE: Board Layout