Clock, Step and Hold logic


Following on from Sequence Dancing – Schmitt_trigger_NAND_implementation, and the number of issues with that schematic (from CMOS 4017 Based 8 Step Sequencer)…


Basically, the HOLD function of the schematic above does not work:

  1. An inverted (inverted by the HOLD circuit debouncing Schmitt trigger – see below) active low button press to the HOLD control (i,e, where the input to the circuit above is active high),  does not hold, but, rather, enables the clock. The active low HOLD button press is inverted by the Schmitt trigger NAND gate (see schematic below), providing an active high HOLD input to the schematic above. However, this actually enables the clock, rather than holding it.
  2. A positive edge is created when the HOLD is released, thereby advancing the clock asynchronously
  3. If the active low button press is passed through an additional inverter, so that the input to the circuit above is now active low, then the action of pressing hold gives a rising edge clock, thereby holding on the subsequent step, rather than the current step..

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Synth Power Supplies


Sort of following on from VCO madness, I was really looking for the Super Simple VCO (which seems to be actually a 555 timer as a VCO, see the GetLoFi LFO in Ha Ha Ha… 555 fun). However, I got distracted and ended up analysing PSUs and buses for synths.

For ease, in order to power my synth, I had been planning on using a couple of single rail 12V SMPS designed for LED lights, in order to make a dual rail supply, but I started to wonder about the noise implications – as all designs for synths appear to use the old fashioned transformer, rectifier, and linear regulator approach.

(As an aside, Julien Ilett also points this potential noise (as related to buck convertors and SMPS) issue out in Julian builds: a Split Voltage Power Supply (+/-12v and 5v) @5:20. See also, Julian’s Postbag: #85 – E.Ink, Spring Onion, Split PSU (@7:33-8:00), where he mentions that high frequency noise is not removed by the linear regulators in the Split Rail Power Supply Kit Build – SEPIC Cuk Topology).

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Veroboard dimensions


Following on from Veroboard and the Sequencer bus described in Sequencer notes, the sequencer bus consists of two separate stripboard designs:

  • The first step, and;
  • The second step (and subsequent)steps), which all use the same board layout.

With respect to the 9T24H (9T25H) board used for the “Second (and subsequent) Step Sequencer Bus v0.9″… as there are 9 of these boards for the 2-10 potentiometer stages for each sequencer (10 step) stage, is it not more economical to combine on one larger board, of n x 9 Tracks?

Likewise, the v0.7 of the First Step Sequence Bus, requires 12T30H, will that not fit multiple times on a larger size board?

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VCO madness


Simple VCOs using the CEM3340… Three from Look Mum No Computer, two from Electronics Today International, a couple from the datasheet and some examples of commercial implementation.

Also included are a few VCOs implemented using a 555, as well as an approximation of the CEM3340 (also using a 555).

Finally a VCO for Terence Thomas, using a LM566.

(There is a companion CEM3310 – voltage controlled envelope generator, see ADSR madness)

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